ASIC/FPGA Design Verification Engineer (5090r)

Mountain View, CA | Contract

Post Date: 03/21/2017 Job ID: 5090 Industry: Software

ASIC/FPGA Design Verification Engineer

Seeking design verification engineer for verification of FPGA design. 

 

 

Required Skills:

  • At least 2-3 years experience in ASIC or FPGA design verification
  • UVM
  • System Verilog
  • Scripting – Either Ruby or Python (preferably both)

 

Desired Skills:

  • Experience with Make files

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