SOC Verification Engineer - System Level Verification

Mountain View, CA 94043 | Contract

Post Date: 04/04/2018 Job ID: 5329 Industry: Engineering

System level verification of SOC test bench (CPU + GPU + multi-media engines + Southbridge). Tests will be written in C/C++, compiled for CPU and run on simulation/emulation board. Verilog and C/C++ required.

  • Verilog and C/C++ coding
  • Makefiles, Perl scripting  
  • Chip/full system level ASIC Verification skills, and debug skills a must – Debug using waveforms is required.
  • System level knowledge - System is defined as a test bench containing {CPU + GPU + multi-media engines + Southbridge} with hardware based coherency, hardware based transaction ordering. System could be a simulation test bench, emulation test bench or a board.   Tests will be written in C/C++, compiled for CPU and will be run on simulation/emulation/board unchanged


  • Experience working with AMD 64 architecture a great plus
  • Experience working with PCI-Express a plus
  • Block/unit level verification skills using OVM/UVM knowledge desirable, but not required
  • Board level debug desirable

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